Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_80787665b837ed3eb503bbcd27c0043a http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b8159cf9894cbe6010e8c45c09683263 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_34263a1d9767236ba10183da556a136b |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-181 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-97 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-12 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-60 |
filingDate |
2001-09-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_35b499533a5fec5d97310d64ed414fa3 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_cdeb7420e5c2b993447822d568b5b3d8 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fc088648a1783c7f8733c5dc46234bc2 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c652869a4ba9329f1214a910279616d1 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a76b5e38111806ac5ef945f029be8a32 |
publicationDate |
2003-04-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
JP-2003100949-A |
titleOfInvention |
Semiconductor device |
abstract |
PROBLEM TO BE SOLVED: To prevent bending due to external stress of a semiconductor device and a mounting body in which the semiconductor device is mounted on a mounting board in a large-sized CSP type semiconductor device in which signal solder balls are not arranged at corners of a wiring board. And prevent the solder balls from peeling off from the mounting board. SOLUTION: A semiconductor chip is mounted on one main surface of a wiring board, the semiconductor chip is electrically connected to a lead on the wiring board, and the semiconductor chip, the lead, and an electrical connection portion are sealed with a resin. In the semiconductor device having solder balls formed on lands on a surface opposite to the semiconductor chip mounting surface, the lands may include a plurality of electrode lands for electrically connecting to a mounting substrate, and A plurality of dummy lands are arranged at least at corners of the surface and are not electrically connected to the mounting board. |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-1791180-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2006011477-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7683492-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-101014756-B1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/TW-I425604-B http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2006066898-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6960830-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-1791180-A4 |
priorityDate |
2001-09-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |