http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2003018477-A

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filingDate 2001-06-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f5601453ed19d0e895f9baa83559bd66
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publicationDate 2003-01-17-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2003018477-A
titleOfInvention Correlated double sampling timing adjustment device
abstract (57) [Summary] [Problem] To stably and reliably perform timing adjustment of correlated double sampling pulses. It corresponds to high-speed transfer as the number of pixels of the imaging unit increases. SOLUTION: An analog output signal of a CCD 24 is converted to a CDS. Input to the circuit 25. The CDS circuit 25 samples and holds the feedthrough portion of the output signal in synchronization with the feedthrough clamp pulse FP, samples and holds the pixel signal portion of the output signal in synchronization with the sample pulse SP, and subtracts both to reset noise. And low frequency noise. At the time of adjusting the timing of the feed-through clamp pulse FP and the sample pulse SP, the CCD 24 outputs an adjustment signal in accordance with an instruction from the microcomputer 33. Further, the pulse width of the reset pulse RP is adjusted using the adjustment signal.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2008054281-A
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Total number of triples: 45.