| Predicate |
Object |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10K10-466 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10K19-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1214
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1222 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G09F9-30
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L51-05
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-77
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-84
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-12
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 |
| filingDate |
2000-05-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate |
2002-12-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
JP-2002543625-A |
| titleOfInvention |
Minimal patterned semiconductor devices for display applications |
| abstract |
(57) Abstract A thin film transistor array includes at least a first transistor and a second transistor. Each transistor includes a source electrode, a drain electrode, a semiconductor electrode, a gate electrode, and a semiconductor layer. The semiconductor layer is continuous between the first transistor and the second transistor. The semiconductor layer is preferably unpatterned. In various display applications, the transistor geometry is selected to provide an acceptable leakage current. In a preferred embodiment, the transistor array is used in an encapsulated electrophoretic display. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2013515362-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2008242495-A |
| priorityDate |
1999-05-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |