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publicationDate 2002-09-20-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2002271031-A
titleOfInvention Printed wiring board and method for manufacturing printed wiring board
abstract (57) [Abstract] [Problem] To reduce loop inductance, and A printed wiring board with a reduced number of interlayer insulating layers and a method for manufacturing the printed wiring board are proposed. SOLUTION: A core substrate 30 is formed by laminating first, second, and third resin substrates 30a, 30b, 30c each having a conductor circuit 32 formed therein, and a chip capacitor 20 is provided in the core substrate 30. . Thereby, the loop inductance can be reduced, and the number of interlayer resin insulating layers can be reduced. In addition, since the conductive paste 26 is applied to the surfaces of the electrodes 21 and 22 made of metallization, the surfaces of the electrodes 21 and 22 can be made flat, and the via holes 60 can be formed. Connectivity can be enhanced.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2020145465-A
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http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10757820-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10757821-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2010171414-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11266027-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2018533226-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11032915-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2011124257-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2017098404-A
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