http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2002217290-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_0950e9df7f0e1b73efee1bda859951ad |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3205 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-52 |
| filingDate | 2001-01-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_46cf142866f0631276fffc15970135d4 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9273abf41bf2032b571c52285e7ae22e http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_221689b10c56e468058a0228812f73ba http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_602a5fc5738819ab532d3659431364f8 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4fc087178227f89165e76070c567b2b3 |
| publicationDate | 2002-08-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2002217290-A |
| titleOfInvention | Method of forming multilayer wiring |
| abstract | An object of the present invention is to provide a method for forming a highly reliable multilayer wiring while preventing an increase in contact resistance between a via plug and a lower wiring and resistance of the lower wiring. A lower layer C is formed on a surface of an insulating film 2 on a semiconductor substrate 1. U wiring 5 is formed, a silicon nitride film 6 is formed on the insulating film 2 including the surface of the lower Cu wiring 5, and then the surface of the nitride film 5 is subjected to plasma ion treatment to form a pinhole 6a existing on the surface. Is closed (disappears). Thereafter, an interlayer insulating film 7 and a via hole pattern mask 8 are sequentially formed on the surface of the silicon nitride film 6, and the silicon nitride film 6 reaches the portion of the interlayer insulating film 7 on the lower Cu wiring 5 using the mask. After forming the via hole 9a, the silicon nitride film 6 is removed to form a via hole 9b reaching the surface of the lower Cu wiring 5, and the via hole 9a is formed. A via plug 12 is formed by depositing a metal film therein. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-7731338-B2 |
| priorityDate | 2001-01-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 26.