http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2002215605-A

Outgoing Links

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assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_294881271413951a95f284b588a68e66
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F17-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F17-14
filingDate 2001-01-19-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7c314a229b61c0de340f630c047c522d
publicationDate 2002-08-02-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2002215605-A
titleOfInvention Arithmetic system
abstract (57) [Problem] To provide an arithmetic system which does not require a synchronization mechanism, simplifies control and simplifies an apparatus. Kind Code: A1 Abstract: A plurality of configuration information memories (42, 43) for storing configuration information, a data memory (46) for reading and writing operation information in accordance with a designated address, and a plurality of configuration information memories in accordance with a control signal. A selection device for selecting the configuration information, and generating an address of the data memory in a specified pattern upon receiving an activation signal from the CPU 41; An address generation device 45 for reading from the data memory, writing to the data memory, and generating a control signal including selection information corresponding to the generated address and outputting the control signal to the selection device 44; and the configuration information selected by the selection device And an arithmetic unit 47 for performing a predetermined operation on the read data from the data memory and outputting the operation result to the data memory as a write.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2008506191-A
priorityDate 2001-01-19-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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