http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2002176348-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e78bce6d56b21df5bdd2ac3b97a51363 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2621 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-3185 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-30 |
| classificationIPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-26 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-30 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-3185 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-0175 |
| filingDate | 2000-12-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c6ef161797b49dbbf56a778a523fe851 |
| publicationDate | 2002-06-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2002176348-A |
| titleOfInvention | Semiconductor integrated circuit and test method therefor |
| abstract | (57) [Summary] [PROBLEMS] To reliably measure the resistance value of an output buffer having a high driving capability without being affected by contact resistance generated with an IC tester. Provided are a semiconductor integrated circuit that can be suppressed and a test method thereof. When a resistance value of an output buffer B1 is measured, a power supply voltage VDD is supplied to a source of a transistor TrP1 through an ammeter provided in an IC tester. A ground potential GND is supplied from the tester to the source of the transistor TrN1, and a voltmeter provided in the IC tester is connected to the external output terminal P1. Then, the test control signal Te n is set to a high level. In addition, a test signal of a plurality of bits in which only the test control signal T1 goes high and the test control signals T2 to Tn go low is input to the decoder DEC. As a result, the transistors TrP1 and T Although rN1 is turned on, the external output terminals P2 to Pn Goes into a high impedance state. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-100337119-C |
| priorityDate | 2000-12-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 23.