| abstract |
(57) [Problem] To provide a liquid crystal drive circuit capable of reducing power consumption and a load drive circuit capable of reducing settling time. The present invention includes a shift register, a data latch circuit, a load latch circuit, a level shifter, a decoder, an output selection circuit, a bleeder, and a buffer amplifier. I have. Since the number of driving of the flip-flop in the amplifier enable circuit 25 and the number of latch units in the data latch circuit 2 is switched according to the number of gradations, power is not consumed by unnecessary flip-flops and the like, and power consumption can be reduced. The buffer amplifier 6 is composed of a two-stage amplifier, and a resistor and a switch are connected in series between the output terminal of the buffer amplifier 6 and each load. As a result, the time constant becomes constant even if the load fluctuates, the settling time is shortened, Stable operation becomes possible. |