http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2002076914-A
Outgoing Links
Predicate | Object |
---|---|
assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_294881271413951a95f284b588a68e66 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F11-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03M13-27 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03M13-41 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03M13-39 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03M13-29 |
filingDate | 2000-08-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_518fc049a5eee99b7027a648f5b71b5c http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4ed1de8db83bd987910c30c0192305ca |
publicationDate | 2002-03-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | JP-2002076914-A |
titleOfInvention | Interleaving apparatus and interleaving method, and decoding apparatus and decoding method |
abstract | (57) [Summary] PROBLEM TO BE SOLVED: To always fix a delay amount in an interleaver used for iterative decoding and easily adjust an input timing of a reception value to be delayed. An interleaver in an element decoder is provided. 0 indicates a plurality of storage circuits 407 for storing data, The control circuit 400 generates address data for writing data to the storage circuit 407 and address data for reading data from the storage circuit 407. The control circuit 400 is provided with a counter for generating address data for writing and a counter for generating address data for reading separately. When the writing of data to the storage circuit 407 is completed, Starts reading. |
priorityDate | 2000-08-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 69.