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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3205
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filingDate 2000-01-25-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_185383a7853cd470905dd1f34dda5423
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publicationDate 2001-08-03-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2001210644-A
titleOfInvention Semiconductor device and method of manufacturing semiconductor device
abstract [PROBLEMS] To uniformly recess-etch the surface of a wiring layer. A step of forming a groove in a silicon oxide film on a silicon substrate; a step of depositing a TaN film and a Cu wiring material along the surface of the silicon oxide film; With respect to the surface of the TaN film 17, A flattening process is performed until the silicon oxide film 14 is exposed, A step of burying the TaN film 17 and the Cu damascene wiring 18 in the groove 16, hydrogen peroxide reacting with Cu, A recess etching process is performed on the Cu damascene wiring 18 using an etching solution containing glycine that forms a complex with Cu ions and water that dissolves the complex. forming a recess 19 by retreating the surface of the u-damascene wiring 18; forming a TaN film 20 so as to fill the recess 19 on the Cu damascene wiring 18 and the silicon oxide film 14; , Silicon oxide film 1 4 to form a TaN film 20 in the recess 20 by flattening until the surface of the substrate 4 is exposed.
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http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-102481037-B1
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http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2020088178-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2020061567-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2016072633-A
priorityDate 2000-01-25-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 42.