| Predicate |
Object |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-16225
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-3011
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-09701
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-73204
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-15153
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-32225
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-15311 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-49894
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-13
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-145 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-13
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-14
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-498 |
| filingDate |
1997-10-21-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate |
2000-04-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
JP-2000504492-A |
| titleOfInvention |
Method for reducing the radius of curvature of a silicon substrate of an assembled electronic package |
| abstract |
An integrated circuit assembly including a chip interconnect circuit and an integrated circuit die. The chip interconnect circuit is formed from a substrate having a thickness between 5 mils and 25 mils. The integrated circuit die has a thickness of at least 25 mils and is bonded to the chip interconnect circuit. |
| priorityDate |
1996-11-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |