http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2000323682-A

Outgoing Links

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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-108
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8242
filingDate 1999-05-14-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bd43ebfe566cb10326655cb00cb62fe3
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publicationDate 2000-11-24-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2000323682-A
titleOfInvention Semiconductor integrated circuit device
abstract (57) [Summary] [PROBLEMS] To suppress power supply noise particularly during high-frequency operation, such as a memory with a logic function having a noise suppression capacitor, and to further stabilize the operation. SOLUTION: A semiconductor integrated circuit such as a memory with a logic function including a plurality of DRAM macrocells and a logic unit, and a noise countermeasure capacitance including a large number of unit capacitances having the same structure as the information storage capacitance of the memory cell and connected in parallel. In the circuit device, the information storage node S of each unit capacitance of the noise suppression capacitor N is commonly coupled to the diffusion layer DN1 via the contact SNCT and the plug PLUG1, and then the plug PLU G2 is connected to bit line wiring layers BL made of a metal material such as tungsten and formed in the same process as the bit lines of the memory array, and these bit line wiring layers B L are commonly connected to each other at one end.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100844982-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2005101609-A
priorityDate 1999-05-14-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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Total number of triples: 24.