| abstract |
(57) [Summary] In a circuit having a plurality of encoding circuits having different maximum error correction numbers, the encoding circuits are To reduce the overall circuit size by allowing most of the circuits to be shared. A modified word obtained by adding a predetermined fixed value to an input information word in an encoding circuit capable of calculating a parity of a number of bits having different error correction capabilities (where a is an integer of 2 or more). , A first circuit connected to the additional circuit, performing a linear operation using the modified word and the matrix P to generate an intermediate signal u, connected to the first circuit, All or part of the signal and the matrix Q 1 , ..., Q and a second circuit having a number of linear operation circuits that generate a parity value p 1 ,..., pa with a different number of bits, respectively. |