http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2000307130-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_2dcebf5a7f7ddc3b081f70e8ce1c4097 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-26 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-94 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-822 |
| filingDate | 1999-04-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9ceeb6cdac49b61773930dae3f5f44b5 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4f01f5189f5eb9846cbd1a0c706d552c |
| publicationDate | 2000-11-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2000307130-A |
| titleOfInvention | MOS semiconductor device and method of manufacturing the same |
| abstract | (57) Abstract: A MOS semiconductor device capable of reducing plasma charge-up damage and a method of manufacturing the same are provided. SOLUTION: A gate insulating film 12 formed on a silicon substrate 11, a polysilicon film 13 formed on the gate insulating film 12, and a polysilicon film 13 formed on a surface, inside or below the surface of the polysilicon film 13; A low-resistance layer having a lower resistance than the polysilicon. |
| priorityDate | 1999-04-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 18.