Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_5d7576285d411d00c697e07270d2814a |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-318541 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-318536 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-822 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F11-22 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-3185 |
filingDate |
1999-03-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6ec7b095affc35502913c00f57492451 |
publicationDate |
2000-10-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
JP-2000275303-A |
titleOfInvention |
Boundary scan test method and boundary scan test device |
abstract |
(57) [Problem] When a semiconductor integrated circuit including a boundary scan test device is assembled in a package having a small number of pins, there is a problem that a scan test time becomes longer due to an extra boundary scan register. SOLUTION: When there are predetermined boundary scan registers 111 and 112 having no external input / output pins connected in a package in which a semiconductor integrated circuit is assembled, according to a bypass control signal applied to a bypass control signal input terminal 5. Switch 2 for bypassing these predetermined boundary scan registers 111 and 112 0 is provided. |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2007018570-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2005294719-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-4525125-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-4572564-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2005274342-A |
priorityDate |
1999-03-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |