| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_80787665b837ed3eb503bbcd27c0043a
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_34263a1d9767236ba10183da556a136b |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-108
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8242 |
| filingDate |
1999-02-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ff5d6127c116c5a6e1c9d9539d9e6fb1
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b69814d40c0c00f658b5f79667b21315
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8282f5e19b7a5ac072abd7bf9b18a478 |
| publicationDate |
2000-09-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
JP-2000243929-A |
| titleOfInvention |
Semiconductor device and manufacturing method thereof |
| abstract |
(57) Abstract: An electric field in a semiconductor region of a memory cell selection transistor is reduced. SOLUTION: A groove 15 is formed in a semiconductor substrate 1 below a connection hole 14A to which a capacitor is connected, and an insulating film 16 is formed on a side surface of the groove 15. By forming the n + -type semiconductor region 9b of ETQs at a deep position in the semiconductor substrate 1, the gate electrode 7A and the n + -type semiconductor region 9b are separated from each other without increasing the area occupied by the element. . |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100726146-B1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-100732305-B1 |
| priorityDate |
1999-02-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |