| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_7af673589ca45d2fd8b9ea902cdbd1dc |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/F02D45-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F13-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03M1-12 |
| filingDate |
1999-09-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2d77cda319332585c0d0539a56246610
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_371a3932d8a9a4100b8162f66b458143
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fdd100ae7db299c9a3f2bf57d0398c0b
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_352c67e1ee22a48c53efc7eb17836368 |
| publicationDate |
2000-08-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
JP-2000220517-A |
| titleOfInvention |
Electronic control unit |
| abstract |
(57) [Summary] [PROBLEMS] To recognize whether correct A / D conversion has been performed. An A / D conversion command is set in the first three bits on the CPU side, and A / D conversion channel selection data is set in the following five bits. In the input / output processing IC, the A / D conversion result data for which the A / D conversion has been previously instructed is prepared in the shift register. Here, the reason why the A / D conversion channel is output together with the data is to perform a data check on the CPU side, and to enable collation with a command output by the CPU. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/DE-102008007653-A1 |
| priorityDate |
1999-01-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |