http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2000172628-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_5d7576285d411d00c697e07270d2814a |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F13-28 |
| filingDate | 1998-12-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e802eff2bead3923aed224d8dc0b1ed1 |
| publicationDate | 2000-06-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2000172628-A |
| titleOfInvention | Data transfer device |
| abstract | (57) [Summary] [PROBLEMS] A system processor intervenes in direct memory transfer to process transfer data without providing a dedicated processing processor for data processing. In a system including a CPU, an internal data RAM, and a DMA controller, a DMA receives a direct memory access command for data requiring arithmetic processing and notifies the arrival of the data to a DMA buffer. When a mode register is provided, when the CPU receives an arrival notification from the mode register, the CPU directly reads the corresponding data from the DMA buffer, performs predetermined arithmetic processing, and stores the processed data in the internal data RAM. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2009237790-A |
| priorityDate | 1998-12-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 32.