http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2000138296-A

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filingDate 1998-11-02-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f08089d6d8e4c48f96087e01e1f10878
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publicationDate 2000-05-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2000138296-A
titleOfInvention Semiconductor memory device and method of manufacturing the same
abstract (57) Abstract: To provide an SRAM capable of preventing a distance between a p-well (18) and a drain (28) of an n-well (16) from being shortened without increasing the length of a semi-cess LOCOS oxide film (20). . SOLUTION: The depth of an n-well 16 and a p-well 18 formed in a memory cell region 12 is larger than the depth of an n-well 42 and a p-well 44 formed in a peripheral circuit region 14. It is characterized by being small. Therefore, under the semi-recess LOCOS oxide film 20, the n-well 16 and the p-well 1 8 can be reduced. Therefore, the distance between the p-well 18 and the drain 28 of the n-well 16 can be prevented from being shortened without increasing the length of the semi-recess LOCOS oxide film 20.
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Total number of triples: 27.