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filingDate 1998-10-27-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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publicationDate 2000-05-12-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2000134071-A
titleOfInvention Variable delay circuit
abstract (57) [Problem] To provide a variable delay circuit that can operate at high speed and with high accuracy. A variable delay circuit includes an input terminal DI1, a positive logic type variable delay circuit 1 for delaying an edge of a signal input to the input terminal DI1, and an input terminal DI1. , A negative logic type variable delay circuit 2 that causes a delay in the edge of a signal input to the input terminal, an edge of a signal output from the positive logic type variable delay circuit 1, and an edge of a signal output from the negative logic type variable delay circuit 2. And an extraction circuit for extracting and outputting only the edge having a delay according to the set time from the data.
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