http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2000115234-A

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filingDate 1998-09-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_81e27832ff73a5feb2783c988118523d
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publicationDate 2000-04-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2000115234-A
titleOfInvention Packet processing device, packet processing method, and packet switch
abstract (57) [Summary] [PROBLEMS] To provide a packet processing device that realizes a smooth pipeline process without contention for access to a shared memory between different layer processes while saving memory. In a packet processing method for exchanging packet data by configuring a plurality of layers, the entire packet is stored in a packet memory, and both a layer 2 processing unit of a data link layer and a layer 3 processing unit of a network layer are used. It is characterized in that the same memory space can be accessed by using a shared memory to be shared, a part of the transmission / reception packet necessary and sufficient for both processes is stored, and the shared memory can be accessed by multiple ports. Further, when accessing the shared memory, the layer 2 processing unit and the layer 3 It is characterized by employing a pipeline processing method in which the processing unit does not interfere.
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Total number of triples: 27.