| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_4ddcb273a108a5d8472b335280098e06 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C8-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-407 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-407
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C8-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-408 |
| filingDate |
1999-07-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_098d863df65331008553cf431c412e71
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7e4f525ea91e8ef0f445e0d152ff684a
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6744e3b765729700ba45e1f525071f28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ecf808a96e325b250d5f0a3e13001109
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_de4cb4f02006a748f2e055d879f054d0 |
| publicationDate |
2000-02-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
JP-2000040367-A |
| titleOfInvention |
Integrated memory |
| abstract |
To provide an integrated memory in which supply of a column decoder picture of a column address is performed by another means. SOLUTION: A column decoder for decoding a column address and addressing a corresponding bit line, a first column address bus and a second column address bus are provided. A first column address is transmitted to a column decoder via the second column address bus, and a second column address is transmitted to the column decoder via the second column address bus. The bit line is addressed according to the column address of 2. |
| priorityDate |
1998-07-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |