http://rdf.ncbi.nlm.nih.gov/pubchem/patent/IE-52492-B1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e5db580deca7130dbe51805c6c608b35 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0847 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0251 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-08 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088 |
| filingDate | 1981-06-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 1987-11-25-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | IE-52492-B1 |
| titleOfInvention | Semiconductor integrated circuit device having a high tolerance of abnormal high input voltages |
| abstract | A semiconductor integrated circuit device having a high tolerance against abnormal high input voltages comprises a first MIS transistor (T2) forming the input stage and a second MIS transistor (T1) forming part of the. internal circuit elements of the device. The source (30) or drain (31) of the first MIS transistor (T2) is connected to an input electrode (10). The drain (31) or source (30), whichever is not connected to the electrode (10) of the first MIS transistor (T2) is connected to the gate (1) of the second MIS transistor (T1). Whichever of the source (30) or drain region (31) of the first MIS transistor (T2) is connected to the electrode (10) is formed by doping with phosphorus atoms. The other diffusion regions are formed by doping with arsenic atoms. The depth of the source (30), or drain region (31) of the first MIS transistor (T2) is greater than the other diffusion regions. In addition, the source (30) or drain (31) region of the first MIS transistor (T2) has a considerable gradient with regard to the concentration of the phosphorous atoms. As a result, the depletion layer between the source (30) or drain (31) region of the first MIS transistor (T2) and the semiconductor substrate (4) is broader than that in the other region. Consequently, a high tolerance against abnormal high input voltages is obtained. |
| priorityDate | 1980-07-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
| Predicate | Subject |
|---|---|
| isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID5359596 http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID419586572 |
Total number of triples: 18.