| abstract |
A display has an array of organic light-emitting diode (OLED) display pixels operating at a low refresh rate. Each display pixel includes a drive transistor, T2, coupled in series with emission transistors, T4, T5, and an OLED, 304. A semiconducting-oxide transistor, T3, is coupled between the drain, N1, and gate, N2, terminals of the drive transistor to help reduce leakage during low-refresh-rate display operations. A silicon transistor, T7, is interposed between the semiconducting-oxide transistor and the gate terminal of the drive transistor. One or more capacitor structures may be coupled to the source and/or drain terminals of the semiconducting-oxide transistor to reduce rebalancing current that might flow through the semiconducting-oxide transistor as it is turned off Configured in this way, emission current flowing through the OLED is insensitive to any potential drift in the threshold voltage of the semiconducting-oxide transistor. Also disclosed is method of operating a display by varying the duty cycle of a PWM scheme to compensate for luminance drop over time and a method of operating a display by adapting a first voltage level of a scan control signal to changes in the threshold voltage in a semiconducting oxide transistor. |