| abstract |
A method of manufacturing a transistor comprising: providing a substrate 1 with a semiconductor material 5 supported by the substrate, and a region of electrically conductive material 2. A resist layer 3 is formed on these layers to form a cover, a depression is then formed in the surface of the covering of resist material, said depression extending over a first portion of said region of conductive material, said first portion 21 (fig 1d) separating a second portion 22 of the conductive region from a third portion 23 of the conductive region. The resist material located under the depression is removed so as to form a window exposing the first portion 21 of the electrically conductive region, which is then removed to expose a connecting portion of the semiconductor material 51. A layer of dielectric material 61 is formed over the exposed portion of semiconductor material. An electrically conductive material is deposited over said layer of dielectric material 61, the layer of dielectric material electrically isolating the layer of electrically conductive material from the second and third portions of the conductive region. |