| abstract |
A ceramic multilayer substrate (12) comprises a substrate of laminated ceramic green sheets with wiring patterns and conductive vias (3a) formed therein. The upper surface (9) of the substrate has surface wiring patterns (4) provided which connect with vias (3a). Line shaped insulation patterns (8) are formed over the surface wiring patterns (4) to form soldering land electrodes (7) to which various semiconductor devices may be electrically connected to. The insulating patterns (8) have a low solder wetting property which enable high precision, fine soldering lands to be formed. |