| abstract |
A method of forming a contact opening (450) in a dielectric layer (345) of a semiconductor device comprises forming a self aligned contact (SAC) layer (240) over gates (120, 121), and forming opening (450) to contact an active region (116) of a semiconductor device (500). The SAC layer (240) includes a compound comprising either a group III element and a group IV element, a group III and a group V element, or two group IV elements, e.g. silicon carbide and boron nitride. Alternatively, SAC layer (240) may be titanium carbide. The SAC layer (240) may be amorphous, and may be deposited by chemical or physical vapour deposition. The semiconductor device (500) may include a transistor with source (115, 117), drain (116) and gate (120, 121), which may be part of a static or dynamic random access memory element (SRAM) or (DRAM). The contact structure (555) in opening (450) may comprise plug (565) with barrier layers (561,562). |