| abstract |
A semiconductor process for forming bipolar junction transistors (BJTs) and metal-oxide-semiconductor (MOS) devices (30, 40) includes the steps of: (a) forming first silicide contacts coupled to said source, drain emitter and gate members, said first silicide contacts being impervious to subsequent etching steps and being allowed to overlap gate or isolation areas without electrical connection thereto; (b) depositing an insulative layer (89) over said BJTs and MOS devices; (c) masking said insulative layer to form openings to said selected ones of said first silicide contacts; (d) forming a second silicide layer on said first silicide contacts opened in step (e); (e) depositing an interconnective layer; (f) etching said interconnective layer, said second silicide layer, said insulative layer, but not said first silicide contacts, to define interconnect lines coupled to said source, drain emitter, base and gate members. <IMAGE> |