http://rdf.ncbi.nlm.nih.gov/pubchem/patent/GB-1502587-A
Outgoing Links
Predicate | Object |
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assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e757fd4fedc4fe825bb81b1b466a0947 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66833 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1083 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-792 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C16-0466 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C16-04 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-792 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-788 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8247 |
filingDate | 1976-11-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationDate | 1978-03-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | GB-1502587-A |
titleOfInvention | Semiconductor data storage devices |
abstract | 1502587 Semi-conductor data storage devices INTERNATIONAL BUSINESS MACHINES CORP 16 Nov 1976 [31 Dec 1975] 47658/76 Heading H1K A data storage device comprises a region 22 of one conductivity type having a conductivity greater than that of said one conductivity type substrate 12, the region 22 being disposed below and being contiguous with a permanent channel region 20 of another conductivity type, source and drain regions 16, 18, respectively, of said another conductivity type, a composite gate insulation layer 24, 26, and a gate electrode 28, e.g. of aluminium. It is stated that during the writing-in of the data, avalanching is confined to the surface of the channel region and the trapped charges at the interface of nitride/oxide layer converts the normally depletion mode device into an enhancement mode device, and this changed conduction characteristic is read out using a bit sensing circuit. In the example disclosed, the regions 20, 22 are formed by ion implantation after the formation of silicon oxide/silicon nitride composite insulation layer. A matrix comprising the data storage devices at the intersections of gate electrodes with the source and drain regions is disclosed. The gate region is bonded on either side by silicon dioxide layer 32. |
priorityDate | 1975-12-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 29.