http://rdf.ncbi.nlm.nih.gov/pubchem/patent/GB-1394062-A
Outgoing Links
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|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_264d491c251dcab259dd0ecd44f6f29f |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01033 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-014 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01074 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01079 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01078 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-10253 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01006 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01024 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01029 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-01013 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-80 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-53209 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-60 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-532 |
| filingDate | 1971-10-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 1975-05-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | GB-1394062-A |
| titleOfInvention | Semi-conductor devices |
| abstract | 1394062 Semi-conductor devices LUCAS ELECTRICAL CO Ltd 3 Oct 1972 [8 Oct 1971] 46850/71 Heading H1K A semi-conductor chip is provided with an upstanding metal land through which it may be soldered to a conductive substrate or a conductive land on an insulating substrate by the following method. The chip 11 (Fig. 2) e.g. of silicon is first provided with an aluminium layer 12, part of which is exposed through an aperture 14 in silica glass layer 13. A 500 Š thick layer 16 of chromium, titanium or tungsten and a 1000 Š layer 17 of nickel or copper are deposited to extend into the aperture and are covered with photoresist 18 which is exposed and developed to expose the part of layer 17 within aperture 14. The chip is then immersed in a nickel chloride plating bath and connected first as anode to clean the surface of layer 17 and then as cathode to deposit nickel 21, which is further built up by electroplating in a nickel sulphamate bath and then gold plated to prevent it tarnishing. After removal of the photoresist the layers 16, 17 where not protected by the nickel 21 are etched away in a mixture of ceric sulphate and sulphuric acid. The chip may then be mounted to an insulating substrate by inverting it to bring the land 21 and any other similar lands into contact with solder coated lands on the substrate and heating to fuse the solder. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/GB-2194386-B http://rdf.ncbi.nlm.nih.gov/pubchem/patent/GB-2194386-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0178181-A2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0178181-A3 |
| priorityDate | 1971-10-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 52.