http://rdf.ncbi.nlm.nih.gov/pubchem/patent/GB-1325332-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_10ed6da739ce747c5acbf10148f3f851 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0638 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088 |
| filingDate | 1970-06-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate | 1973-08-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | GB-1325332-A |
| titleOfInvention | Semiconductor devices |
| abstract | 1325332 IGFET PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd 23 June 1970 [26 June 1969] 30463/70 Heading H1K To suppress undesired channel formation in an IGFET comprising source and drain inclusions of one conductivity type in a substrate region of opposite type defining a channel therebetween, a more highly doped region of the same type as the substrate is provided at its surface, which surrounds the area occupied by the source, drain and channel and is in physical contact with at least one of the source and drain. The region, preferably less highly doped than the source and drain may extend to a greater depth than they do and laterally beneath them. In another case it is more highly doped but of lesser depth than the source and drain which it partially overlaps. This overlapping allows a certain amount of latitude in the alignment of masks used in forming the highly doped and source and drain regions. The highly doped region preferably extends beneath the gate electrode to precisely define the sides of the channel. Typically the surface passivating and gate insulation is silica and the substrate N type, but if alumina is used the substrate may be P type. Another possible passivant is silicon nitride, either alone or with silica, and germanium and AIII BV compounds are suggested as semi-conductors. The preferred embodiment is an integrated memory element of a shift register and includes two rings each consisting of three IGFETs and interconnected as shown in Fig. 1. Fig. 2 shows the physical arrangement. In manufacture an N + region is formed by conventional diffusion of arsenic into the entire face of a 111 or 100 oriented N type silicon wafer apart from the areas within dotted lines 33, 34. Then boron is diffused in more shallowly to define the source and drain regions 12 to 17. The necessary connections are in the form of deposited aluminium strips 7-11. Channel formation can be further suppressed by use of a passivation layer which is thicker beyond the boundaries of the IGFETs. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/GB-2123605-A |
| priorityDate | 1969-06-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 31.