| abstract |
1,196,834. Semi-conductor devices. HITACHI Ltd. 26 March, 1968 [29 March, 1967], Nov., 14541/68. Heading H1K. An electrode applied to a surface of a semiconductor wafer 22 having an insulating covering 32 comprises an Al layer 34 contacting the substrate surface and extending across the insulation 32, a layer 38 of a refractory metal; i.e. Mo, Cr, Ti, W or Ta; also extending across the insulation 32 and contacting the A1 layer 34, and a further metal layer 42; e.g. of Ag. Au, Ni or Cu: in contact with the layer 38. The refractory metal layer 38 is, in general, less finely shaped than the A1 layer 34, since it is less easily etched into detailed configurations. Thus in the Si transistor shown the A1 layer 34 forms a comb-like base electrode interdigitated with a similar comb-like A1 emitter electrode 36 connected to a series of strip-like emitter regions and on which are provided a relatively large-area rectangular refractory metal layer 40 and a further metal layer 44. The layer 38 is similarly relatively large and rectangular. If the layers 42, 44 are of Au, an Au wire may be thermo-compression bonded thereto. If Ni is used for the layers 42, 44 a solder terminal may be applied thereto, e.g. by dipping. The layers 42, 44 may be positioned so as not to overlie directly the A1 layers 34, 36 (Fig. 8B, not shown). The insulating layer may be of silicon oxide. In further embodiments a second insulating layer (67), Figs. 3C-3F (not shown), e.g. of silicon oxide or nitride or of glass, is applied over the A1 layers (64, 66), and the refractory metal layers (68, 70) are deposited through apertures (69, 71) etched in the layer (67) to overlie parts of the A1 layers (64, 66) and of the first insulating layer (62). The further metal layers (72, 74) are then applied and connection made thereto by thermo-compression bonding or soldering as described above. A final embodiment is described in which the refractory metal layers (110, 112), Figs. 10A- 10D (not shown), are initially applied directly to the unbroken first insulating layer (108), following which apertures are etched through the layer (108) to the active surface of the wafer (102) and the A1 layers (114, 116) are applied to contact both the exposed wafer surface and the refrac. tory metal layers (110, 112) and to overlie parts of the insulation (108). A second insulating layer (118) is deposited, apertures exposing parts of the refractory metal layers (110, 112) are etched therein and Ni layers (124, 126) are deposited in these apertures. Finally the wafer is dipped in solder to apply terminals (128, 130) to the Ni layers (124, 126). |