http://rdf.ncbi.nlm.nih.gov/pubchem/patent/FR-3005201-A1

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filingDate 2013-04-24-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c8d890661721e98c95e351db44a18b6c
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publicationDate 2014-10-31-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber FR-3005201-A1
titleOfInvention METHOD FOR MAKING A METAL GRID MOS TRANSISTOR, ESPECIALLY A PMOS TRANSISTOR, AND CORRESPONDING INTEGRATED CIRCUIT
abstract The method for producing at least one MOS transistor comprises a formation of doped source and drain regions comprising a dopant activation annealing (RC) and, prior to said formation of the source and drain regions, a formation above a substrate of a dielectric region (2) and forming a gate (3) having a formation of a metal gate region (30). The formation of the metal gate region (30) comprises forming a layer of a first material (301) for decreasing the absolute value of the threshold voltage of the transistor, and a configuration of a portion (302) of the metal gate region so as to also form a diffusion barrier over said layer of the first material.
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