| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_673b1e27064bc6f9f8d483fab8118ab7
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_99505f5f312672820e9f78c254c00a4d |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-422 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/C23C18-1893
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/C23C18-1608
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/C23C18-1653
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-18
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/C23C18-2086
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76874
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-24
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76873
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76867
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-7685
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-48
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76843 |
| classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-42 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-768
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/C23C18-18
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/C23C18-16
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/C23C18-28 |
| filingDate |
2003-02-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_60cf3d59b4caa636c237c78684c0a984
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e7bd44069098340a68a173773caf1d0d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4b2a7fcd73aeb5b8002af37b8548eee9
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_85e22ede70d718599576448a335b821a |
| publicationDate |
2004-08-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
FR-2851258-A1 |
| titleOfInvention |
SURFACE COATING METHOD, MICROELECTRONIC INTERCONNECTION FABRICATION USING THE SAME, AND INTEGRATED CIRCUITS |
| abstract |
The present invention relates to a process for coating a surface of a substrate with a germination film of a metallic material, said surface being a conductive or semi-conducting surface of electricity and having depressions and / or protrusions. The method comprises: disposing on said surface an organic film having a thickness such that the free face of this film conforms suitably to the depressions and / or protrusions of said conductive or semiconductive surface of the electricity on which it is arranged; inserting within said organic film disposed on said surface a precursor of the metallic material, at the same time as, or after, the step of disposing on said surface said organic film; and transforming said precursor of the metallic material inserted in said organic film into said metallic material. This method allows the manufacture of integrated circuits, microelectronic interconnections, and microsystems. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-2813553-B1 |
| priorityDate |
2003-02-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |