http://rdf.ncbi.nlm.nih.gov/pubchem/patent/FR-2755297-A1

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filingDate 1997-06-05-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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publicationDate 1998-04-30-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber FR-2755297-A1
titleOfInvention METHOD FOR FORMING A MULTILAYER WIRING IN A SEMICONDUCTOR COMPONENT
abstract A method of forming multilayer wiring in a semiconductor component is described. By this method, a layer of material produced in the back etching step of an organic SOG layer or through hole formation can be removed by ultraviolet irradiation of the substrate surface or by exposing the substrate to an O2 or O3 plasma atmosphere after the back etching of the organic SOG layer or formation of the through hole. Thus, deterioration of the electrical characteristics of a semiconductor component, which is caused by electrical contact failures between upper and lower conductive layer patterns or by chipping of a dielectric layer pattern, can be prevented. .
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