http://rdf.ncbi.nlm.nih.gov/pubchem/patent/FR-2712410-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_040ec81c891acc3f3186f56cb99cf161 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F2207-5523 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F7-552 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F7-552 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F7-533 |
| filingDate | 1993-11-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b1bdb95145de076a0887c123678df6b0 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8ca721f67776f7d94dab583c33b332cf http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_47f9ac5a4be6c83425fd06f81f3bf855 |
| publicationDate | 1995-05-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | FR-2712410-A1 |
| titleOfInvention | Elevating circuit squared with binary numbers. |
| abstract | The present invention relates to a circuit for squaring a binary number X of n bits x0 to xn - 1, comprising preprocessing circuits (30) to form the set of products xi xj of the bits of the number x, where i and j vary between 0 and n-1 such that i <= j. The outputs of the preprocessing circuits provide words (L0, L1 ...) such that each is formed by a succession as complete as possible of products chosen from among those which remain from said set after the formation of the preceding word, each product xi xj of this succession being classified at a rank i + j + 1 of the word if i is different from j or at a rank 2i if i = j. Adders are connected to form the sum of the words as the square of the number X. |
| priorityDate | 1993-11-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 19.