http://rdf.ncbi.nlm.nih.gov/pubchem/patent/FR-2675286-A1

Outgoing Links

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classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F13-366
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F13-366
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F13-362
filingDate 1991-04-15-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_481c51e3e1d7be4d031da00ce9a5e8e8
publicationDate 1992-10-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber FR-2675286-A1
titleOfInvention INTEGRATED CIRCUIT ARBITRATOR OF MCA BUS AND USES OF SUCH A CIRCUIT.
abstract The invention relates to a bus arbitrator integrated circuit, characterized in that it comprises a bus arbitration logic, a control logic, a decoding circuit, a set of registers, and a logic circuit decoding the signals received for determining one operating mode among four, to control, as a function of the selected mode, the operation of the various circuits and the meaning of the contents of the registers of the set.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-6374319-B1
priorityDate 1991-04-15-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 22.