| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_51d028c578ae85cb937b5b34a5129fbc |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F2212-151
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F2212-1024
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F2212-651
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F2009-45583 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F12-145
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F12-1009
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F11-0751
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F11-0787
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F12-109
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F11-073
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F11-0712
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F9-45558 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F12-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F9-455 |
| filingDate |
2017-08-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_88e43ae627996aa00fc3b949ec2f3625
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5df5c2fbf2f9922ff76a2b59f1d1511c
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9a9aae5fa945202246a5814a1c91aec1 |
| publicationDate |
2019-07-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
EP-3510488-A1 |
| titleOfInvention |
Translate on virtual machine entry |
| abstract |
A processor includes a core with virtualization support circuitry to, in response to a request to access an instruction, retrieve a logical address from a virtual machine control structure (VMCS) associated with a virtual machine. The logical address corresponds to the instruction to be accessed. The virtualization support circuitry may further translate the logical address to a guest virtual address; invoke translation circuitry to translate the guest virtual address to a guest physical address, and translate the guest physical address to a host physical address; and store at least one of the guest physical address or the host physical address in the VMCS. |
| priorityDate |
2016-09-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |