http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-3427265-A2
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c3a2f00e72ba6e4c09b6da573427fbed |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-2273 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-221 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-2293 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-2257 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C7-1042 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C8-18 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-22 |
| filingDate | 2017-03-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_06d5d4cd8045fcaefc6e37ef7059fad6 |
| publicationDate | 2019-01-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | EP-3427265-A2 |
| titleOfInvention | Parallel access techniques within memory sections through section independence |
| abstract | A memory device having a plurality sections of memory cells, such as ferroelectric memory cells (hybrid RAM (HRAM) cells) may provide for concurrent access to memory cells within independent sections of the memory device. A first memory cell may be activated, and it may be determined that a second memory cell is independent of the first memory cell. If the second memory cell is independent of the first memory cell, the second memory cell may be activated prior to the conclusion of operations at the first memory cell. Latching hardware at memory sections may latch addresses at the memory sections in order to allow a new address to be provided to a different section to access the second memory cell. |
| priorityDate | 2016-03-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 20.