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filingDate 2015-04-20-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c4858c2877aa0e13b48601f7514c80a3
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_48ec6a6172fa073cffc2d14a3d1b00eb
publicationDate 2017-03-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber EP-3146559-A1
titleOfInvention METHODS FOR CONSTRUCTING THREE DIMENSIONAL (3D) INTEGRATED CIRCUITS (ICs) (3DICs) AND RELATED SYSTEMS
abstract Methods for constructing three dimensional integrated circuits and related systems are disclosed. In one aspect, a first tier is constructed by creating active elements such as transistors on a holding substrate. An interconnection metal layer is created above the active elements. Metal bonding pads are created within the interconnection metal layer. A second tier is also created, either concurrently or sequentially. The second tier is created in much the same manner as the first tier and is then placed on the first tier, such that the respective metal bonding pads align and are bonded one tier to the other. The holding substrate of the second tier is then released. A back side of the second tier is then thinned, such that the back surfaces of the active elements (for example, a back of a gate in a transistor) are exposed. Additional tiers may be added if desired essentially repeating this process.
priorityDate 2014-05-19-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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