http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-2822027-A2
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_99505f5f312672820e9f78c254c00a4d |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66833 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-40117 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-792 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7831 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42344 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B43-00 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-792 |
| filingDate | 2014-07-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_dd9d287425a8513aa1cbff6860fdf4df |
| publicationDate | 2015-01-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | EP-2822027-A2 |
| titleOfInvention | Method for manufacturing a double-gate electronic memory cell and related memory cell |
| abstract | The present invention relates to a method for manufacturing a double-gate electronic memory cell, said electronic memory cell comprising:na substrate;na first gate structure deposited on the substrate, the first gate structure having at least one lateral flank;na stack comprising several layers and at least one of said layers capable of storing electrical charges, said stack covering at least the lateral flank of the first gate structure and a part of the substrate;na second gate structure isolated from the first gate structure and from the substrate by the stack. The second grid structure furthermore comprises:na first portion formed of a first gate material;na second portion formed of a second gate material, said first gate material being selectively etchable with respect to said second gate material and said second gate material selectively etchable with respect to said first gate material;na first siliciding zone extending over said first part of the second grid structure;na second siliciding zone extending over said second portion of the second grid structure. |
| priorityDate | 2013-07-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 25.