| abstract |
Conventional metallization processes fail at high density or small feature size patterns. For example, during patterning dry films may collapse or lift-off resulting in short circuits or open circuits in the metallization pattern. An exemplary method for metallization of integrated circuits includes forming features (520) such as trenches, pads, and planes in a dielectric layer (504) and depositing and selectively treating a seed layer (506) in desired features of the dielectric layer. The treated regions of the seed layer (508) may be used as a seed for electroless deposition of conductive material (510), such as copper, into the features. When the seed layer is a catalytic ink, the seed layer may be treated by curing the catalytic ink with a laser. |