http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-2472624-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_b8d7a963516c60934729f785cfe5699f |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N70-063 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N70-8822 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N70-826 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N70-245 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L45-00 |
| filingDate | 2011-12-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c315bd22c462dfb9de4be6d889b1276d |
| publicationDate | 2012-07-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | EP-2472624-A1 |
| titleOfInvention | Method for etching a microelectronic programmable memory device |
| abstract | The present invention relates to a method for etching a programmable memory microelectronic device (10) comprising a substrate (1) covered by at least the following successive layers: a first electrode (2) based on a first metal element, a layer (4) of chalcogenide doped with a second metal element, a second electrode (5) based on a third metal element, an electrically conductive layer (6) of the diffusion barrier type, and a hard mask (7), the method comprising a step of etching at least the hard mask (7), the electrically conductive layer (6), the second electrode (5), and the chalcogenide layer (4) with an inert gas plasma (4). ) the etching step being characterized in that it is carried out by sputtering at a temperature strictly below 150 ° C., preferably at a temperature of at most 120 ° C., and particularly preferably at a temperature of not more than 100 ° C. |
| priorityDate | 2010-12-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 32.