http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-2270862-A2
Outgoing Links
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assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1af8df51ce24ca931ae718fb747f6aa0 |
classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y02E10-50 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14643 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-0002 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14621 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76807 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14632 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14636 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-7681 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76829 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-53238 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76834 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14687 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14689 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L31-04 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-532 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-146 |
filingDate | 2008-02-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_10f6174c5e9c35bc3eaf5e6874814ef8 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_333b8b44edf75721166ab1e18a1df6fa http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4c97be8004e7108ae52c06d6aebe4a14 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0fe929bfa45f4c348f928a8e20bb0c3e http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fd0c1659c1c0769d525447e669d186bd |
publicationDate | 2011-01-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | EP-2270862-A2 |
titleOfInvention | A manufacturing method of a photoelectric conversion apparatus with dual-damascene interconnections |
abstract | A manufacturing method of a photoelectric conversion apparatus is provided which comprises a semiconductor substrate (1), a photoelectric conversion element (1-3) and a MOS transistor disposed in the semiconductor substrate (1), and a multilayered wiring structure including a stacking of a plurality of wiring layers having a plurality of wirings (15,23), and interlayer insulation films (17-19) mutually isolating wiring layers. Further, the manufacturing method comprises steps of forming a gate electrode (4,7) of the MOS transistor, and a plurality of activation regions (5,8), forming a first interlayer insulation film (17) on the semiconductor substrate (1), forming a first hole in the first interlayer insulation film (17), forming a metal film in the first hole, to form a first plug (9) mutually connecting between the plurality of activation regions (5,8), between the gate electrodes (4,7) of the plurality of MOS transistors, or between the activation region (5) and the gate electrodes (4,7) of the MOS transistor, forming a second hole in the first interlayer insulation film, forming a metal film in the second hole, to form a second plug (11) connected electrically to any of the plurality of activation regions (5,8), forming a second interlayer insulation film (18) covering the first (9) and second (11) plugs, and forming a dual damascene structure (13,15) on the second interlayer insulation film (17) according to a dual damascene process. |
priorityDate | 2007-02-23-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 35.