http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-2053514-A1

Outgoing Links

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http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F11-30
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11B19-048
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F3-06
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filingDate 2007-08-03-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6fa253580405d3f948976a0ce0b8be2e
publicationDate 2009-04-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber EP-2053514-A1
titleOfInvention Peripheral device, integrated circuit for peripheral device and method for analyzing failure of peripheral device
abstract The peripheral device of the present invention is connected to a computer 200 through an interface cable 3, and is provided with a second memory device 13 for storing an evaluation program for 22 for evaluating the peripheral device 100 and its integrated circuit 400, a detection section 10 for detecting whether the mode indicating signal which is transmitted from the computer 200 indicates the test mode or the normal mode, and a starting means 15 which starts the evaluation program 22 on the second memory device 13 when the detection section 10 has detected that the mode indicating signal has shown the test mode. Thereby, the failure analysis of the peripheral device and its integrated circuit can be carried out in a state where the integrated circuit is mounted on the peripheral device.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-105717253-B
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-105717253-A
priorityDate 2006-08-03-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 23.