| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c3a2f00e72ba6e4c09b6da573427fbed |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31144
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0271
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-32139
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3065
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3086
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0337
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0338 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-033
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-308
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-311
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3213 |
| filingDate |
2007-03-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_159c1bd5a11bf8e8f33dcd098c114ef0
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1605b82b600bb887df8a40cbf883bc93
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c76ad7d6965e080dc7ae18bda0fb9518 |
| publicationDate |
2008-12-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
EP-2002465-A1 |
| titleOfInvention |
Trim process for critical dimension control for integrated circuits |
| abstract |
Methods of etching substrates employing a trim process for critical dimension control for integrated circuits are disclosed. In one embodiment, the method of etching includes providing a first hard mask layer (130) over a target layer (120); providing a second hard mask layer (140) over the first hard mask layer (130); providing a photoresist layer (150) over the second hard mask layer (140); forming a pattern in the photoresist layer (150); transferring the pattern into the second hard mask layer (140); and trimming the second hard mask layer (140) with the photoresist layer (150) on top of the second hard mask layer (140). The top surface of the second hard mask layer (140) is protected by the photoresist (150) and the target layer (120) is protected by the overlying first hard mask layer (130) during the trim etch, which can therefore be aggressive. |
| priorityDate |
2006-03-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |