| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_be055db3c1a09879df07379ba969e223 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-665 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823425
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823418
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-8234
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823468
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-41775
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823443
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-417 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-417
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234 |
| filingDate |
2005-03-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_154c79ee061ee7f8bc0131ee3af2ed99 |
| publicationDate |
2007-09-12-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
EP-1833087-A1 |
| titleOfInvention |
Semiconductor device and method for manufacturing same |
| abstract |
A thickness of each of side walls (105) in a transistor TrA is made thinner than a thickness of each of side walls (105) in a transistor TrB. In the transistor TrA, a surface of a high concentration impurity diffusion layer (106) and a bottom portion of the side wall (105) are at overlapping positions when viewed from a principal surface direction of a substrate. A silicide layer (108) is formed only in the high concentration impurity diffusion layer (106). Such limited formation can be realized by forming the high concentration impurity diffusion layer (106) in the transistor TrA after forming a CVD oxide film (111) covering the transistor TrB and prior to forming the silicide layer (108). In such a manner, off-leak characteristics can be improved by a simple structure, and the silicide transistor and the non-silicide transistor can be concurrently formed on the same one substrate. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2011037127-A1
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8536681-B2 |
| priorityDate |
2004-12-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |