| abstract |
A process for manufacturing a phase change memory array,nincludes the steps of: forming a plurality of PCM cells (33),narranged in rows and columns; and forming a plurality ofnresistive bit lines (35) for connecting PCM cells (33)narranged on a same column, each resistive bit lines (35)ncomprising a respective phase change material portion (31'),ncovered by a respective barrier portion (32'). After formingnthe resistive bit lines (35), electrical connection structuresn(45, 52) for the resistive bit lines (35) are formed directlynin contact with the barrier portions (32') of the resistivenbit lines (35). |