http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-1403929-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_294881271413951a95f284b588a68e66 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10S438-933 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y10S438-938 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66242 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7378 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-737 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-331 |
| filingDate | 2002-06-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_738d3a853269413c28e7f738d54fbfd0 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_61f415cdfebbf1017754b680b0785da8 |
| publicationDate | 2004-03-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | EP-1403929-A1 |
| titleOfInvention | Semiconductor layer and forming method therefor, and semiconductor device and production method therefor |
| abstract | The present invention relates to a semiconductor layer applicable to a hetero-junction bipolar transistor, a forming method thereof, and a semiconductor device and a manufacturing method thereof, for example. The semiconductor layer and the forming method thereof according to the present invention includes a first SiGe film or SiGeC film containing Ge of which the concentration become equal to a thermal expansion coefficient of silicon oxide and a second SiGe film or SiGeC film formed on the first film. In a semiconductor device according to the present invention and a manufacturing method thereof, first and second layers are laminated on an oxide film having an opening, and the first layer has the substantially same thermal expansion coefficient as that of the oxide film and has a thermal expansion coefficient different from that of the second layer. Thus, a stress that is caused by a difference between the thermal expansion coefficients becomes difficult to occur in the laminated film, and hence the occurrence of misfit dislocation can be suppressed. Thus, the present invention is suitable as the application to a hetero-junction bipolar transistor. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-100452321-C http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-100407442-C |
| priorityDate | 2001-06-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 31.