| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_2dff902f580792a5b5b5e40f1e29bfd6 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2889
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2851
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-31905 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F11-22
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-66
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-26
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G01R31-319 |
| filingDate |
2000-06-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bc69b729f9ca897567a0638c4b395e74 |
| publicationDate |
2002-03-27-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
EP-1190322-A2 |
| titleOfInvention |
Semiconductor parallel tester |
| abstract |
A semiconductor parallel tester is disclosed for simultaneously testing a plurality of DUTs secured to a handling apparatus. The test system includes a system controller for initiating system test signals and a pin electronics assembly responsive to the system test signals to generate test pattern signals for application to the plurality of DUTs. The system further includes a signal interface defining a plurality of direct signal paths between the handling apparatus and the pin electronics assembly. |
| priorityDate |
1999-06-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |